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Japan Rapidus: ¥920B Funding Fuels 2nm Chip Ambition

Japan is betting ¥920 billion on Rapidus, a semiconductor startup with no manufacturing experience, to challenge incumbent foundry giants. Its mission: achieve high-volume manufacturing of 2-nanometer (2nm) process node technology by 2027—an audacious, almost fantastical goal.

¥920 Billion
Cumulative investment in Rapidus
2nm by 2027
Rapidus's manufacturing goal

The "Why": A Nation's Bid for a Second Chance

Japan, once the 1980s leader in the DRAM market, saw its market share erode due to intense competition from South Korea and a strategic pivot away from high-volume memory production. Decades later, a perfect storm of pandemic-era supply chain disruptions and escalating tech nationalism has forced a dramatic reversal in industrial policy. But Tokyo's strategy isn't just defensive; it's a calculated offensive to re-establish leadership in the semiconductor value chain, built on two core pillars.

First is a shift from a defensive posture of supply chain resilience to an offensive industrial strategy. The government has designated semiconductors a "critical material" under its economic security laws, a move to ensure a stable domestic supply. [Source: METI] Yet, the true goal is far more audacious: to triple sales from domestically produced semiconductors and related equipment to ¥15 trillion by 2030. [Source: METI reports, Nikkei, Jiji Press] The massive, escalating state investment in Rapidus—from an initial ¥70 billion to a cumulative ¥920 billion—is the financial engine for this national champion initiative, signaling a clear intent to compete, not just survive. [Source: METI, Reuters, Nikkei]

¥15 Trillion
Target sales from domestic semiconductors by 2030

Second is the creation of a "Team Japan" designed to reconstitute a complete leading-edge logic ecosystem. Rapidus is not a typical startup; its founding consortium includes the titans of Japanese industry: Toyota and Denso from automotive, Sony and NEC from electronics, and NTT and SoftBank from telecommunications. [Source: METI, Nikkei Asia] This broad alliance reveals the strategy's true scope: to establish a domestic source of leading-edge logic chips for Japan's strategic industries. By licensing IBM's gate-all-around (GAA) nanosheet transistor technology for its 2nm process and collaborating with Belgium's IMEC on advanced lithography and process R&D, Japan is attempting a strategic leapfrog—bypassing mature process nodes to compete directly at the technology frontier. [Source: IBM Newsroom, AnandTech]

For global tech firms, this represents a potential new foundry partner outside of Taiwan, diversifying a geopolitically concentrated supply chain. For incumbent foundries like TSMC and Samsung, it signals the emergence of a heavily subsidized, state-backed rival targeting the lucrative high-performance computing (HPC) and AI accelerator markets.

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